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NJU26901
Digital Audio Delay
! General Description
The NJU26901 is a digital audio delay. The NJU26901 provides delay-time adjustment function and digital audio interface. ! Package
! FEATURES
NJU26901E2
* 2-Channel Audio Delay (24 bits data width). Delay Time 85msec at fs = 48kHz ( 128msec at fs = 32kHz , 43msec at fs = 96kHz) * 4 delay time modes( 1/4, 1/2, 3/4, 1 max. delay ) are selectable without a micro-computer. * To make long delay time, the NJU26901 can be connected serially. * Non-audio-signal data can be delayed by the NJU26901.
! Hardware Specification
* * * * * Digital Audio Interface Digital Audio Format Audio Bit Clock (BCK) Frequency Package Power Supply : : : : : 1 Input port / 1 Output port I2S 24bit BCK : 64fs, Slave Mode 13MHz Max ( approximate fs=200KHz) EMP8 Pb-Free 2.5V ( +3.3V input tolerant )
Ver.2004-06-24
-1-
NJU26901
! Function Block Diagram
NJU26901 BCKI LRI
LRI BCKI SDI
SERIAL AUDIO INTERFACE Delay RAM
SERIAL AUDIO INTERFACE
L/R in
L/R
SDO
Control Logic
COUNT[1:0]
Fig. 1 Function Block Diagram
! Pin Assignment
SDI LRI BCKI VSS 1 2 NJU26901 3 4 6 5 COUNT[1] COUNT[0] 8 7 VDD SDO
Fig. 2 Pin Assignment
! Pin Description
Table 1 Pin Description
No. Symbol I/O Description 1 SDI I Audio Data Input 2 LRI I LR Clock Input 3 BCKI I Bit Clock Input 4 VSS G GND 5 COUNT[0] I* Delay Time Control 0 6 COUNT[1] I* Delay Time Control 1 7 SDO O Audio Data Output 8 VDD P Power Supply +2.5V I : Input, I* : Input(internal pull-up), O : Output, P: +Power, G : GND
-2-
Ver.2004-06-24
NJU26901
! Absolute Maximum Ratings
Table 2 Absolute Maximum Ratings
Parameter Power Supply Voltage Input Pin Voltage Power Dissipation Storage Temperature Symbol VDD VTM PD TSTR Rating -0.3 to +3.0 -0.3 to +3.6 100 -40 to +125 Units V V mW C
! Electric Characteristics
Table 3 Electric Characteristics (VDD=2.5V,Ta=25)
Parameter Operating VDD Voltage Operating Current Operating Temperature High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Current Input Current Input Capacitance Input Rise/Fall transition Time Symbol VDD IDD TOPR VIH VIL VOH VOL IIN IIN(PU) CIN tr / tf IOH= -2mA IOH= -100uA IOL= 2mA IOL= 100uA VIN= VSS3.6V VIN= VSS3.6V BCKI:13MHz SDO:CL=25pF Test Condition Min. 2.25 -40 2.0 VDD-0.4 VDD-0.1 -15 -100 Typ. 2.5 1.0 25 10 Max. 2.75 85 3.3 0.5 0.4 0.1 +15 +15 100 Units V mA V V V V uA uA pF ns
! Equivalent Circuit
VDD Input terminal VSS Input terminal VSS VDD Output terminal VSS VDD
Input Pin #1,2,3
Input Pin #5,6
Output Pin #7
Fig. 3 Input Terminal Equivalent Circuit
Ver.2004-06-24
-3-
NJU26901
! Serial Audio Timing
Table 4 Serial Audio Input Timing Parameters
Parameter BCKI Frequency BCKI Period L Pulse Width H Pulse Width BCKI to LRI Time LRI to BCKI Time Data Setup Time Data Hold Time Data Output Delay Symbol fBCK tSIL tSIH TSLI tLSI tDS tDH tDOD SDO:CL=25pF Test Condition Min 35 35 15 15 15 15 Typ. Max 13 15 Units MHz ns ns ns ns ns ns
LRI
tSIH tSIL tSLI tLSI
BCKI
tDS tDH
SDI
SDO
tDOD
Fig. 4 Serial Audio Input / Output Timing
-4-
Ver.2004-06-24
NJU26901
! Serial Audio Interface
Digital Audio format is I2S 24bit 64fs in fig. 5. The input and output format are the same I2S 24bit 64fs.
LRI BCKI
M SB LSB 32 Clocks M SB 32 Clocks LSB Left Channel Right Channel
SDI, SDO
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Fig 5 Digital Audio Format (I2S 24bits 64fs)
! Function Description
* SDI(#1) is serial audio input pin. The input audio data should be connected to this pin. The NJU26901 fetches in the input audio data every LRI edge. * LRI(#2) is LR clock input pin. This LR clock frequency is the same frequency of the input audio signal. LRI="Low" shows SDI and SDO data are left channel data. LRI="High" shows SDI and SDO data are right channel data. * BCKI(#3) is bit clock input pin. This BCKI clock frequency is 64 times as large as the input audio signal. * SDO(#7) is serial audio output pin. The delayed audio data come out through this pin. * VDD(#8) is 2.5V power supply pin. VSS(#4) is GND pin. The decoupling capacitor is necessary between VDD and VSS. * The input pins can interface to 3.3V ICs. The output pins can interface to 2.5V ICs. Refer to table3 "Electric Characteristics". * After Power-on RESET, there is possibility the NJU26901 generates random data for the delay time period set by COUNT[0],[1] pins. If necessary, the mute circuit should be added.
! Delay Time
* The NJU26901 provides maximum 4097 samples delay and slave-mode audio interface. The delay time depends on sampling frequency. * Delay time is controlled by COUNT[0], COUNT[1]. Table 5 shows Delay Time vs Sampling Frequency. * Detail delay time is evaluated by the following formula. [sec] Delay time = {1/(fs)} x (sampling number + 1) * The sampling number is incremented every LRI clock. Table 5 Delay Time vs Sampling Frequency Sampling Frequency 4/4 3/4 (fs) (COUNT[1:0]=11) (COUNT[1:0]=01) 192KHz 21ms 16ms 96KHz 43ms 32ms 88.2KHz 47ms 35ms 48KHz 85ms 64ms 44.1KHz 93ms 69ms 32KHz 128ms 96ms Sampling number (4097) (3073)
1/2 (COUNT[1:0]= 10) 11ms 21ms 23ms 43ms 46ms 64ms (2049)
1/4 (COUNT[1:0]= 00) 5ms 11ms 12ms 21ms 23ms 32ms (1025)
Ver.2004-06-24
-5-
NJU26901
! Change Delay Time Setting
The delay-time is set by COUNT[0],[1]. The delay-time can be changed during the NJU26901 operation. In case the delay-time setting is changed, the NJU26901 sets up the new delay-time and initializes itself again within 2 BCKI rising edge. After setting the new delay-time, the NJU26901 holds SDO low-level, mute, during the new delay-time period. After mute, the audio data come out through SDO. The NJU26901 discards the input data which come during new delay-time setting period.
! Application block diagram
2.5V
ANALOG LIN DATA OUT ANALOG RIN LR CLK OUT 1 SDI 2 VDD 8 ANALOG LOUT DATA IN ANALOG ROUT BIT CLK IN 6
LRI
7 SDO
ADC
BIT CLK OUT MASTER CLK OUT
3
NJU26901
BCKI COUNT[1] VSS COUNT[0]
DAC
0.1uF 10uF LR CLK IN MASTER CLK IN
4
5
Delay Time = 85msec @ fs=48KHz (COUNT[0:1]=11)
Fig. 6 Application Block Diagram
-6-
Ver.2004-06-24
NJU26901
! Package Dimensions
EMP8
o
0 - 10 4.9 8 0.1 5
0.1
0.2
3.9
6.0
1 0.6MAX 1.27
4
0.20 0.1
0.05
0.10
0.40
0.1
0.15
M
0.15 +0.1 -0.05
1.5
Unit
Fig. 7 Package Dimensions
Ver.2004-06-24
0.65
-7-
0.25
NJU26901
Version V1.11
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
-8-
Ver.2004-06-24

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